As new generations of computer chips continue to shrink in size, so do the copper pathways that transport electricity and information around the labyrinth of transistors and components. When these pathways - called interconnects - grow smaller, they become less efficient, consume more power, and are more prone to permanent failure.
To overcome this hurdle, industry and academia are vigorously researching new candidates to succeed traditional copper as the material of choice for interconnects on computer chips. One promising candidate is graphene, an atom-thick sheet of carbon atoms arranged like a nanoscale chicken-wire fence. Prized by researchers for its unique properties, graphene is essentially a single layer of the graphite found commonly in our pencils or the charcoal we burn on our barbeques.
Led by Rensselaer Professor Saroj Nayak, a team of researchers discovered they could enhance the ability of graphene to transmit electricity by stacking several thin graphene ribbons on top of one another. The study, published in the journalACS Nano, brings industry closer to realizing graphene nano-electronics and naming graphene as the heir apparent to copper.
"Graphene shows enormous potential for use in interconnects, and stacking up graphene shows a viable way to mass produce these structures", stated Saroj Nayak, a professor in the Department of Physics, Applied Physics, and Astronomy at Rensselaer. "Cooper's limitations are apparent, as increasingly smaller copper interconnects suffer from sluggish electron flows that results in hotter, less reliable devices. Our new study makes a case for the possibility that stacks of graphene ribbons could have what it takes to be used as interconnects in integrated circuits."
The study, based on large-scale quantum simulations, was conducted using the Rensselaer Computational Center for Nanotechnology Innovations (CCNI), one of the world's most powerful university-based supercomputers.
Copper interconnects suffer from a variety of unwanted problems, which grow more prominent as the size of the interconnects shrink. Electrons travel through the copper nanowires sluggishly and generate intense heat. As a result, the electrons "drag" atoms of copper around with them. These misplaced atoms increase the copper wire's electrical resistance, and degrade the wire's ability to transport electrons. This means fewer electrons are able to pass through the copper successfully, and any lingering electrons are expressed as heat. This heat can have negative effects on both a computer chip's speed and performance.
It is generally accepted that a quality replacement for traditional copper must be discovered and perfected in the next five to 10 years in order to further perpetuate Moore's Law - an industry mantra that states the number of transistors on a computer chip, and thus the chip's speed, should double every 18 to 24 months.
Saroj Nayak's recent work, published in the journalACS Nano, is titled "Effect of Layer Stacking on the Electronic Structure of Graphene Nanoribbons". When cut into nanoribbons, graphene is known to exhibit a band gap - an energy gap between the valence and conduction bands - which is an unattractive property for interconnects. The new study shows that stacking the graphene nanoribbons on top of each other, however, could significantly shrink this band gap. The study may be viewed on-line at: http://dx.doi.org/10.1021/nn200941u .
"The optimal thickness is a stack of four to six layers of graphene", stated Neerav Kharche, first author of the study and a computational scientist at CCNI. "Stacking more layers beyond this thickness doesn't reduce the band gap any further."
The end destination, Saroj Nayak said, is to one day manufacture microprocessors - both the interconnects and the transistors - entirely out of graphene. This game-changing goal, called monolithic integration, would mean the end of the long era of copper interconnects and silicon transistors.
"Such an advance is likely still many years into the future, but it will certainly revolutionize the way nearly all computers and electronics are designed and manufactured", Saroy Nayak stated.
Along with Saroj Nayak and Neerav Kharche, contributors to this study were: former Rensselaer physics graduate student Yu Zhou; Swastik Kar, former Rensselaer physics research assistant professor; and Kevin P. O'Brien of Intel Corporation.
This research was supported in part by the New York State Interconnect Focus Center at Rensselaer; the Semiconductor Research Corporation; and the National Science Foundation (NSF) Division of Electrical, Communications, and Cyber Systems, and a generous gift from a donor who wished to remain anonymous. Computational resources were partly funded by Rensselaer and New York state through CCNI; and by NSF through nanoHUB.org.