This new 3D NAND technology, which was jointly developed by Intel and Micron, stacks layers of data storage cells vertically with extraordinary precision to create storage devices with three times higher capacity than competing NAND technologies. This enables more storage in a smaller space, bringing significant cost savings, low power usage and high performance to a range of mobile consumer devices as well as the most demanding enterprise deployments.
Planar NAND flash memory is nearing its practical scaling limits, posing significant challenges for the memory industry. 3D NAND technology is poised to make a dramatic impact by keeping flash storage solutions aligned with Moore's Law, the trajectory for continued performance gains and cost savings, driving more widespread use of flash storage.
"Micron and Intel's collaboration has created an industry-leading solid-state storage technology that offers high density, performance and efficiency and is unmatched by any flash today", stated Brian Shirley, vice president of Memory Technology and Solutions at Micron Technology. "This 3D NAND technology has the potential to create fundamental market shifts. The depth of the impact that flash has had to date - from smartphones to flash-optimized supercomputing - is really just scratching the surface of what's possible."
"Intel's development efforts with Micron reflect our continued commitment to offer leading and innovative non-volatile memory technologies to the marketplace", stated Rob Crooke, senior vice president and general manager, Non-Volatile Memory Solutions Group, Intel Corporation. "The significant improvements in density and cost enabled by our new 3D NAND technology innovation will accelerate solid-state storage in computing platforms."
One of the most significant aspects of this technology is in the foundational memory cell itself. Intel and Micron chose to use a floating gate cell, a universally utilized design refined through years of high-volume planar flash manufacturing. This is the first use of a floating gate cell in 3D NAND, which was a key design choice to enable greater performance and increase quality and reliability.
The new 3D NAND technology stacks flash cells vertically in 32 layers to achieve 256Gb multilevel cell (MLC) and 384Gb triple-level cell (TLC) die that fit within a standard package. These capacities can enable gum stick-sized SSDs with more than 3.5TB of storage and standard 2.5-inch SSDs with greater than 10TB. Because capacity is achieved by stacking cells vertically, the individual cell dimensions can be considerably larger. This is expected to increase both performance and endurance and make even the TLC designs well-suited for data centre storage.
The key product features of this 3D NAND design include: