BSC and Atos/Bull worked together in HPC chip development already, most notably the Mont Blanc series of projects.
That the BSC lead consortium indeed has won the Framework contract can be derived from the interview in La Vanguardia this morning with BSC director Mateo Valero. The microprocessor framework consortium has 23 members including BSC, Atos/Bull, BMW, Kalray French, Italian E4, and Semidynamics. Valero estimates it will take three years to develop the microprocessor.
The Spanish Secretary of State for research, development and innovation, Carmen Vela told Vanguardia: "The leadership of the BSC-CNS in Supercomputing "will impact the quality of life of citizens, both because it will be beneficial for the industry for applications that generate, for example, in personalized medicine and automotive".
What will the Framework Phase I look like? It will address two topics:
1. Low-power Processing System Units demonstrating the synergies between high performance computing at the exascale level and scalability to distributed collaborating systems in emerging computing applications, in the automotive sector for example, providing industry in Europe with a competitive edge in processor technology to be further exploited across a wide range of applications from engineering, science and biomedical to automotive, manufacturing, finance and emerging big-data and smart objects fields.
The project should generate the functional and non-functional requirements for low-power Processing System Units using representative HPC and big-data benchmarks, emerging applications specifications, in the automotive sector for example, and targeting maximum energy-efficiency and reliability. It will design the architecture of the Processing System Units; verify, tape-out, validate, test and bring up the Processing System Units; develop the required firmware and system software leveraging, as much as possible, on open source efforts and solutions. Sustainability and economic viability of the developed solutions are key aspects.
2. Low-power Processing Units for application acceleration
Generate the functional and non-functional requirements for low-power Processing Units (using relevant representative benchmarks/applications) and design the architecture of the Processing Units to accelerate specific applications such as connected and autonomous driving, cognitive computing, deep learning or other emerging applications. The applications must have high-volume potential. Processing Units may be realised as standalone components, distributed collaborating systems or IP-blocks. Where relevant, open-source hardware approaches may be employed.
In the second phase these building blocks will be validated using representative HPC and big-data benchmarks and emerging applications.
Apart from the Framework microprocessor, there is another European microprocessor development project which looks at ARM/FPGA processors, called EuroEXA - see our coverage: Exascale project EuroEXA kicks-off in Barcelona - to receive 20 million euro funding . BSC is also part of that project.
More information about EuroHPC can be found at http://eurohpc.eu .